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| CM17699 COLOR PDP DRIVER MODULE PRODUCT PREVIEW 1 2 2.1 2.2 3 3.1 4 5 6 6.1 6.2 6.3 6.4 6.5 6.6 6.6.1 6.6.2 6.6.3 6.6.4 6.7 CM17699 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CM17699 CONNECTORS DEFINITION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SIGNAL CONNECTOR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . POWER SUPPLY CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CM17699 SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DETAILS OF DIE BONDING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PCB MECHANICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FPC MECHANICAL SPECIFICATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . STV7699 SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PAD DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CIRCUIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC Timings Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC Timings Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . INPUT/OUTPUT SCHEMATICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 2 2 3 4 5 5 5 5 5 6 7 7 8 8 8 9 9 11 January 1999 This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/11 CM17699.TIF CM17699 The CM17699 is plasma Display Panel (PDP) data driver board implementing 5 data drivers referenced STV7699. This module addresses 320 column electrodes of a plasma panel. The monoblock structure of this module and the output Flexible Printed Circuit (FPC) realizes a high density package for data drivers ICs. This module is adapted to standard definition large size PDPs. The bidirectional feature of this module allows its implementation on the top side and/or bottom side of the panel without any modification in the data bit stream. 1 - CM17699 MAIN FEATURES - Equiped with five STV7699 devices - 4 x 16-bit bidirectional shift register - Mounted connectors/capacitors - Configurable for AC/DC power supply - FPC compatible with narrow pitches of column electrodes - Compatible with custom designs. Output Count Output Pitch Logic Power Supply Power Supply Voltage Power Output Current Clock Frequency Dimension 320 320mm 4.5V to 5.5V 30V to 160V 40mA 20MHz COB - 92 x 33 FPC - 101.4 x 50 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 B23 B24 A34 A33 A32 A31 B31 B32 B33 B34 BLK VSS POL VSS F/R VSS STB VSS CLK VSS A44 A43 A42 A41 B41 B42 B43 B44 A54 A53 A52 A51 B51 B53 B53 B54 2 - CM17699 CONNECTORS DEFINITION 2.1 - Signal Connector Input signal connector is a 50 nodes high density connector defined as follow : 1 2 3 4 5 6 7 8 9 10 11 12 13 14 A14 A13 A12 A11 B11 B12 B13 B14 A24 A23 A22 A21 B21 B22 2.2 - Power Supply Connector Power supplies come from 2 connectors of 3 nodes each (VPP, VDD, VSS). The use of both connectors is not necessary as all the supplies are connected together on the board. The use of both connectors spread the currents on the PC borad and reduce the EMI radiations. Depending on the application, the data module can be configured either for DC supplies or for AC supplies of the data drivers by the implementation of surface mounted devices. 2/11 CM17699 3 - CM17699 SCHEMATIC Decoupling capacitors must be located as close as possible to the drivers. If the damping and protection resistor in VPP line of each driver is different to 0, the decoupling capacitor should not be mounted. Figure 1 04-24 04-23 04-22 04-21 04-20 04-19 04-18 04-17 04-16 04-15 04-14 04-13 04-12 04-11 04-10 01-24 01-23 01-22 01-21 01-20 01-19 01-18 01-17 01-16 01-15 01-14 01-13 01-12 01-11 01-10 TP4-1 TP1-1 04-9 04-8 04-7 04-6 04-5 04-4 04-3 04-2 04-1 01-9 01-8 01-7 01-6 01-5 01-4 01-3 01-2 VPP4 IC4 30 29 VPP4 1 VPP1 IC1 30 29 01-1 VPP1 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 OUT24 OUT23 OUT22 OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT24 OUT23 OUT22 OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 VSSP VSSP VSSP VSSP VSSP VSSP VPP VPP VPP VPP VPP 04-25 31 OUT25 04-26 32 OUT26 04-27 33 OUT27 04-28 34 OUT28 35 VCC 100 VCC 01-25 31 OUT25 01-26 32 OUT26 01-27 33 OUT27 01-28 34 OUT28 35 VPP VCC 100 VCC A14 A13 A12 A11 B11 B12 B13 B14 A24 A23 A22 A21 B21 B22 B23 B24 A34 A33 A32 A31 B31 B32 B33 B34 BL PO F/R ST J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 CON50 J2 VCC VPP 1 2 3 CON3 J3 VCC VPP 1 2 3 CON3 A41 A1 99 A42 A2 98 A43 A3 97 A44 A4 96 CLK 95 ST STB 94 VSSLOG 93 A11 A1 99 A12 A2 98 A13 A3 97 A14 A4 96 CLK 95 ST STB 94 VSSLOG 93 VSSP VSSP 04-29 36 OUT29 04-30 37 OUT30 04-31 38 OUT31 04-32 39 OUT32 40 41 01-29 36 OUT29 01-30 37 OUT30 01-31 38 OUT31 01-32 39 OUT32 40 41 VSSP VSSSUB 04-33 42 OUT33 04-34 43 OUT34 04-35 44 OUT35 04-36 45 OUT36 46 STV7699 (Die) VSSLOG 92 VSSLOG 91 VSSLOG 90 F/R F/R 89 BL BLK 88 PO POL 87 HIZ 86 VCC VSSP VSSSUB STV7699 (Die) VSSLOG 92 VSSLOG 91 VSSLOG 90 F/R F/R 89 BL BLK 88 PO POL 87 HIZ 86 VCC 01-33 42 OUT33 01-34 43 OUT34 01-35 44 OUT35 01-36 45 OUT36 46 VSSP B44 B4 85 B43 B3 84 B42 B2 83 B41 B1 82 VSSSUB 81 VSSP B14 B4 85 B13 B3 84 B12 B2 83 B11 B1 82 VSSSUB 81 04-37 47 OUT37 04-38 48 OUT38 04-39 49 OUT39 04-40 50 OUT40 01-37 47 OUT37 01-38 48 OUT38 01-39 49 OUT39 01-40 50 OUT40 OUT41 OUT42 OUT43 OUT44 OUT45 OUT46 OUT47 OUT48 OUT49 OUT50 OUT51 OUT52 OUT53 OUT54 OUT55 OUT56 OUT57 OUT58 OUT59 OUT60 OUT61 OUT62 OUT63 OUT64 OUT41 OUT42 OUT43 OUT44 OUT45 OUT46 OUT47 OUT48 OUT49 OUT50 OUT51 OUT52 OUT53 OUT54 OUT55 OUT56 OUT57 OUT58 OUT59 OUT60 OUT61 OUT62 OUT63 OUT64 79 VSSP VSSP VSSP VSSP VSSP VSSP VPP VPP VPP VPP VPP 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 80 04-49 01-49 04-41 04-42 04-43 04-44 04-45 04-46 04-47 04-48 04-50 04-51 04-52 04-53 04-54 04-55 04-56 04-57 04-58 04-59 04-60 04-61 04-62 04-63 04-64 01-41 01-42 01-43 01-44 01-45 01-46 01-47 01-48 01-50 01-51 01-52 01-53 01-54 01-55 01-56 01-57 01-58 01-59 01-60 01-61 01-62 01-63 VPP4 VPP4 TP4-2 VPP1 01-64 VPP VPP1 TP1-2 05-24 05-23 05-22 05-21 05-20 05-19 05-18 05-17 05-16 05-15 05-14 05-13 05-12 05-11 05-10 02-24 02-23 02-22 02-21 02-20 02-19 02-18 02-17 02-16 02-15 02-14 02-13 02-12 02-11 02-10 TP5-1 TP2-1 VPP5 IC5 30 29 VPP5 1 VPP2 IC2 30 29 VPP2 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 05-25 31 OUT25 05-26 32 OUT26 05-27 33 OUT27 05-28 34 OUT28 35 VCC 100 VCC 02-25 31 OUT25 02-26 32 OUT26 02-27 33 OUT27 02-28 34 OUT28 35 VCC 100 VCC A51 A1 99 A52 A2 98 A53 A3 97 A54 A4 96 CLK 95 ST STB 94 VSSLOG 93 A21 A1 99 A22 A2 98 A23 A3 97 A24 A4 96 CLK 95 ST STB 94 VSSLOG 93 A44 A43 A42 A41 B41 B42 B43 B44 A54 A53 A52 A51 B51 B52 B53 B54 05-9 05-8 05-7 05-6 05-5 05-4 05-3 05-2 05-1 02-9 02-8 02-7 02-6 02-5 02-4 02-3 02-2 OUT2 OUT24 OUT23 OUT22 OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT24 OUT23 OUT22 OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT1 VSSP VSSP VSSP VSSP VSSP VSSP VPP VPP VPP VPP VPP 02-1 VPP VSSP VSSP 05-29 36 OUT29 05-30 37 OUT30 05-31 38 OUT31 05-32 39 OUT32 40 41 02-29 36 OUT29 02-30 37 OUT30 02-31 38 OUT31 02-32 39 OUT32 40 41 VSSP VSSSUB 05-33 42 OUT33 05-34 43 OUT34 05-35 44 OUT35 05-36 45 OUT36 46 STV7699 (Die) VSSLOG 92 VSSLOG 91 VSSLOG 90 F/R F/R 89 BL BLK 88 PO POL 87 HIZ 86 VCC VSSP VSSSUB STV7699 (Die) VSSLOG 92 VSSLOG 91 VSSLOG 90 F/R F/R 89 BL BLK 88 PO POL 87 HIZ 86 VCC 02-33 42 OUT33 02-34 43 OUT34 02-35 44 OUT35 02-36 45 OUT36 46 VSSP B54 B4 85 B53 B3 84 B52 B2 83 B51 B1 82 VSSSUB 81 VSSP B24 B4 85 B23 B3 84 B22 B2 83 B21 B1 82 VSSSUB 81 05-37 47 OUT37 05-38 48 OUT38 05-39 49 OUT39 05-40 50 OUT40 02-37 47 OUT37 02-38 48 OUT38 02-39 49 OUT39 02-40 50 OUT40 OUT41 OUT42 OUT43 OUT44 OUT45 OUT46 OUT47 OUT48 OUT49 OUT50 OUT51 OUT52 OUT53 OUT54 OUT55 OUT56 OUT57 OUT58 OUT59 OUT60 OUT61 OUT62 OUT63 OUT64 OUT41 OUT42 OUT43 OUT44 OUT45 OUT46 OUT47 OUT48 OUT49 OUT50 OUT51 OUT52 OUT53 OUT54 OUT55 OUT56 OUT57 OUT58 OUT59 OUT60 OUT61 OUT62 OUT63 OUT64 79 VSSP VSSP VSSP VSSP VSSP VSSP VPP VPP VPP VPP VPP 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 80 05-49 02-49 05-41 05-42 05-43 05-44 05-45 05-46 05-47 05-48 05-50 05-51 05-52 05-53 05-54 05-55 05-56 05-57 05-58 05-59 05-60 05-61 05-62 05-63 05-64 02-41 02-42 02-43 02-44 02-45 02-46 02-47 02-48 02-50 02-51 02-52 02-53 02-54 02-55 02-56 02-57 02-58 02-59 02-60 02-61 02-62 02-63 VPP4 VPP5 TP5-2 VPP2 02-64 VPP VPP2 TP2-2 TP3-1 VPP3 1 03-24 03-23 03-22 03-21 03-20 03-19 03-18 03-17 03-16 03-15 03-14 03-13 03-12 03-11 03-10 03-9 03-8 03-7 03-6 03-5 03-4 03-3 03-2 3 VPP3 IC3 OUT24 OUT23 OUT22 OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 VPP VPP VSSP VSSP VPP C1-1 68nF VPP1 (not connect if R = 22W ) 03-25 31 OUT25 03-26 32 OUT26 03-27 33 OUT27 VSSP VPP VCC 100 R1 0 or 22W 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 03-1 2 VCC R2 0 or 22W VPP C1-2 68nF VPP2 (not connect if R = 22W ) A31 A1 99 A32 A2 98 A33 A3 97 A34 A4 96 CLK 95 ST STB 94 VSSLOG 93 03-28 34 OUT28 35 VSSP R3 0 or 22W VPP C1-3 68nF VPP3 (not connect if R = 22W ) 03-29 36 OUT29 03-30 37 OUT30 03-31 38 OUT31 03-32 39 OUT32 40 VSSP VSSSUB R4 0 or 22W VPP C1-4 68nF VPP4 (not connect if R = 22W ) 41 03-33 42 OUT33 03-34 43 OUT34 03-35 44 OUT35 STV7699 (Die) VSSLOG 92 VSSLOG 91 VSSLOG 90 F/R F/R 89 BL BLK 88 PO POL 87 HIZ 86 VCC R5 0 or 22W VPP C1-5 68nF VPP5 (not connect if R = 22W ) 03-36 45 OUT36 46 VSSP B34 B4 85 B33 B3 84 B32 B2 83 B31 B1 82 VSSSUB 81 03-37 47 OUT37 03-38 48 OUT38 03-39 49 OUT39 03-40 50 OUT40 OUT41 OUT42 OUT43 OUT44 OUT45 OUT46 OUT47 OUT48 OUT49 OUT50 OUT51 OUT52 OUT53 OUT54 OUT55 OUT56 OUT57 OUT58 OUT59 OUT60 OUT61 OUT62 OUT63 OUT64 VSSP VSSP VSSP VPP VPP VPP 03-49 03-41 03-42 03-43 03-44 03-45 03-46 03-47 03-48 03-50 03-51 03-52 03-53 03-54 03-55 03-56 03-57 03-58 03-59 03-60 03-61 03-62 03-63 C1 100nF C2 100nF C3 100nF C4 100nF C5 100nF VPP3 03-64 VCC 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 VPP3 TP3-2 3/11 7699C-01.EPS CM17699 3 - CM17699 SCHEMATIC (continued) 3.1 - Details of Die Bonding Figure 2 VCC Test Point VSS Test Point VPP VSSLOG VSSLOG VSSSUB POL CLK STB BLK F/R HIZ VCC A1 A2 A3 A4 B4 B3 B2 B1 VPP OUT1 OUT2 OUT3 OUT4 VSS OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 VSS OUT13 OUT14 OUT15 VPP OUT64 OUT63 OUT62 OUT61 VSS OUT60 OUT59 OUT58 OUT57 OUT56 OUT55 OUT54 OUT53 VSS OUT52 OUT51 STV7699 OUT50 OUT16 OUT17 OUT18 OUT49 OUT48 OUT47 OUT19 OUT20 VSS OUT21 OUT46 OUT45 VSS OUT44 OUT22 OUT23 OUT24 OUT43 OUT42 OUT41 VPP VPP 4/11 7699C-02.EPS OUT25 OUT26 OUT27 OUT28 VSS OUT29 OUT30 OUT31 OUT32 VSS VSSSUB OUT33 OUT34 OUT35 OUT36 VSS OUT37 OUT38 OUT39 OUT40 CM17699 4 - PCB MECHANICAL SPECIFICATIONS The rigid board is 92mm long by 30mm wide. The rigid board can be mounted on the mechanical chassis of the plasma panel or on a heat sinker by clips and/or screws. The recommended size of the heat sinker depends Figure 3 92.0mm 3.3mm 9.60mm 33.0mm on the final application if data drivers are powered with a DC or an AC supply. Power supplies (VPP, VSS) are dispatched by large copper surface in order to spread the current on the board and reduce voltage drops and EMI. CN1 & CN2 : JAE IL-3PL-SMTY-E1500 CN3 : JAE IL-FHR-50S-HF-E3000 9.60mm 4mm 3 CN2 1 50 CN3 1 3 CN1 5mm 10.9mm 35.1mm 10.9mm 5mm 5 - FPC MECHANICAL SPECIFICATIONS Figure 4 101.4mm P 0.3 x (324-1) x 0.9991 = 96.81279 W = 0.15 LCD Bonding 2.25 0.15 10.0mm 15.0mm 1.15 50.0mm 5mm 1.25mm 1.2mm 0.4 0.4 0.4 4.7mm 1.4 3mm 1.4 P 0.25961 x (326-1) = 84.37325 W = 0.1 FPC specifications (UPILEX otherwise thermal expansion specified) Cu Foil : 35m m Ni Plating : > 1m m Au Plating : > 0.1m m PCB Bonding 3.75 6 - STV7699 SPECIFICATIONS 6.1 - Features - 64 outputs plasma display driver - 170V absolute maximum supply - 5V supply for logic - 50/40mA source / sink output - 60/60mA source / sink output diode - 64-bit shift register (20MHz) - BLK, polarity and HIZ control - BCD technology 6.2 - General Description The STV7699 is a Plasma Display Panel (PDP) data driver implemented in ST's proprietary BCD technology. Using a 4-bit wide cascadable shift register, it drives 64 high current & high voltage outputs. By serialy connecting several STV7699, any horizontal pixel definition can be performed. The 20MHz shift clock gives an equivalent 80MHz shift register. The STV7699 is supplied with a separated 170V power output supply and a 5V logic supply. All command inputs are CMOS compatible. 5/11 7699C-04.EPS Design values : Conductor width = 0.15 0.04 Gap width = 0.15 0.04 3 0.4 0.4 0.4 O 0.5mm 6mm 2.0 7699C-03.EPS CM17699 6 - STV7699 SPECIFICATIONS (continued) 6.3 - Pad Dimensions (in m) The reference is the center of the die (x = 0, y = 0). LEFT SIDE from top to bottom Name VPP OUT1 OUT2 OUT3 OUT4 VSSP OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 VSSP OUT13 OUT14 OUT15 OUT16 OUT17 OUT18 OUT19 OUT20 VSSP OUT21 OUT22 OUT23 OUT24 VPP Center : X Center : Y Size : x -1738.0 2867.5 90.0 -1738.0 2703.0 90.0 -1738.0 2570.5 90.0 -1738.0 2411.0 90.0 -1738.0 2228.5 90.0 -1738.0 2093.0 90.0 -1738.0 1952.0 90.0 -1738.0 1813.5 90.0 -1738.0 1631.0 90.0 -1738.0 1453.0 90.0 -1738.0 1235.5 90.0 -1738.0 1046.5 90.0 -1738.0 862.0 90.0 -1738.0 712.5 90.0 -1738.0 566.0 90.0 -1738.0 431.0 90.0 -1738.0 293.0 90.0 -1738.0 82.5 90.0 -1738.0 -109.5 90.0 -1738.0 -277.0 90.0 -1738.0 -471.0 90.0 -1738.0 -691.5 90.0 -1738.0 -822.5 90.0 -1738.0 -953.0 90.0 -1738.0 -1096.0 90.0 -1738.0 -1335.5 90.0 -1738.0 -1569.0 90.0 -1738.0 -1697.5 90.0 -1715.0 -2045.0 90.0 Size : y 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 200.0 Right SIDE from bottom to top Name VPP OUT41 OUT42 OUT43 OUT44 VSSP OUT45 OUT46 OUT47 OUT48 OUT49 OUT50 OUT51 OUT52 VSSP OUT53 OUT54 OUT55 OUT56 OUT57 OUT58 OUT59 OUT60 VSSP OUT61 OUT62 OUT63 OUT64 VPP Center : X Center : Y Size : x 1600.5 -2087.0 90.0 1737.5 -1646.0 90.0 1737.5 -1507.0 90.0 1737.5 -1328.0 90.0 1737.5 -1096.0 90.0 1737.5 -953.0 90.0 1737.5 -822.5 90.0 1737.5 -691.5 90.0 1737.5 -471.0 90.0 1737.5 -277.0 90.0 1737.5 -109.5 90.0 1737.5 82.5 90.0 1737.5 293.0 90.0 1737.5 431.0 90.0 1737.5 566.0 90.0 1737.5 712.5 90.0 1737.5 862.0 90.0 1737.5 1046.5 90.0 1737.5 1235.5 90.0 1737.5 1453.0 90.0 1737.5 1631.0 90.0 1737.5 1813.5 90.0 1737.5 1952.0 90.0 1737.5 2093.0 90.0 1737.5 2228.5 90.0 1737.5 2411.0 90.0 1737.5 2570.5 90.0 1737.5 2703.0 90.0 1737.5 2873.5 90.0 Size : y 200.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 75.0 BOTTOM SIDE from left to right Name OUT25 OUT26 OUT27 OUT28 VSSP OUT29 OUT30 OUT31 OUT32 VSSP VSSSUB OUT33 OUT34 OUT35 OUT36 VSSP OUT37 OUT38 OUT39 OUT40 6/11 Center : X Center : Y Size : x -1443.5 -3077.0 75.0 -1249.0 -3077.0 75.0 -1049.5 -3077.0 75.0 -889.0 -3077.0 5.0 -753.0 -3077.0 75.0 -614.0 -3077.0 75.0 -467.5 -3077.0 75.0 -332.0 -3077.0 75.0 -186.5 -3077.0 75.0 -54.0 -3077.0 75.0 78.0 -3077.0 75.0 209.5 -3077.0 75.0 342.5 -3077.0 75.0 467.5 -3077.0 75.0 607.5 -3077.0 75.0 752.0 -3077.0 75.0 892.5 -3077.0 75.0 1045.5 -3077.0 75.0 1252.0 -3077.0 75.0 1433.5 -3077.0 75.0 Size : y 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 TOP SIDE from right to left Name VSSSUB B1 B2 B3 B4 HIZ POL BLK F/R VSSLOG VSSLOG STB CLK A4 A3 A2 A1 VCC Center : X Center : Y Size : x 1628.5 3073.5 75.0 1478.5 3073.5 75.0 1228.5 3077.0 75.0 978.5 3077.0 75.0 847.5 3077.0 75.0 716.5 3077.0 75.0 486.5 3077.0 75.0 355.5 3077.0 75.0 224.5 3077.0 75.0 31.0 3077.0 200.0 -354.5 3077.0 200.0 -582.0 3077.0 75.0 -713.0 3077.0 75.0 -844.0 3077.0 75.0 -975.0 3077.0 75.0 -1106.0 3077.0 75.0 -1471.5 3077.0 75.0 -1629.0 3077.0 75.0 Size : y 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 CM17699 6 - STV7699 SPECIFICATIONS (continued) 6.4 - Block Diagram CLK A1 P1 16-BIT SHIFT REGISTER P61 F/R B1 16-BIT SHIFT REGISTER A2 P2 P62 B2 16-BIT SHIFT REGISTER A3 P3 P63 B3 16-BIT SHIFT REGISTER A4 P1 P4 P64 B4 VCC VSSLOG Pins 90 to 93 VSSSUB Pins 41-81 VSSP Pins 6-15-24-35 40-46-57-66-75 VPP Pins 1-29-30 51-52-80 P4 P63 P64 STB Q1 Q2 LATCH Q63Q64 BLK POL HIZ STV7699 2 OUT1 79 OUT64 6.5 - Circuit Description STV7699 contains all the logic and the power circuits necessary to drive the colums of a Plasma Display Panel (P.D.P.). Data are shifted at each low to high transition of the (CLK) shift clock. Data are input in a 4-bit wide data bus to A1 - A4 input (case of forward shift mode ; F/R = low). After 16 shifts, the first nibble is available at the serial outputs B1 - B4. These outputs can be used to cascade several drivers to perform any horizontal resolution. CLK, Ai and Bi inputs are Smith trigger inputs to improve the noise margin. The Forward/Reverse (F/R) input is used to select the direction of the shift register. The maximum frequency of the shift clock is 20MHz. All the output data are held and memorized into the latch stage when the Latch input (STB) is high. When it is at low level, data are transferred from the shift register to the latch and to the output power stage. Output state can be forced to high impedance by pulling low HIZ input. When BLK is Low, all the outputs are forced to low level or high level according to POL signal value. Output state copy data that was input, with the same polarity, when BLK, HIZ and POL are High. VSSLOG, VSSSUB and VSSP are not internally connected. VSSLOG and VSSSUB must be connected as close as possible to the logical reference ground of the application. Table 1 : Power Output Truth Table Driver Data STB POL BLK HIZ Output x x x x L HIZ x x L x H L x x H L H H x H H H H Qn (1) L L H H H L H L H H H H Comments High impedance Forced to low Forced to high Latched data Copy data Copy data Note 1 : Qn is the value memorised in the latch stage ; it is the value of the parallel shift register output stage after n Clock pulses. A data loaded in the shift register is read on the output power stage without inversion of its polarity. Table 2 : Control Table F/R L H Ai Input Output Bi Output Input Comments Forward shift Reverse shift 7/11 7699C-05.EPS CM17699 6 - STV7699 SPECIFICATIONS (continued) 6.6 - Characteristics 6.6.1 - Absolute Maximum Ratings Symbol VCC VIN VOUT VPOUT VPP IPOUT IDOUT Tjmax Toper Tstg Parameter Logic Supply Logic Input Voltage Logic Output Voltage Driver Output Voltage Driver Power Supply Driver Output Current (1) Diode Output Current (1) Junction Temperature Operating Temperature Storage Temperature Value -0.3, +7 -0.3, VCC + 0.3 -0.3, VCC + 0.3 -0.3, +170 -0.3, +170 60 +40/-50 +150 -20, +85 -50, +150 Unit V V V V V mA mA C C C Note : 1. Through all power outputs : with power dissipation lower or equal than Ptot and junction temperature lower or equal than Tjmax. 6.6.2 - Electrical Characteristics (VCC = 5V, VPP = 160V, VSSP = 0V, VSSLOG = 0V, VSSSUB = 0V, Tamb = 25C, fCLK = 20MHz, unless otherwise specified) Symbol SUPPLY VCC ICCH ICCL VPP IPPH OUTPUT OUT1-OUT64 VPOUTH VPOUTL VDOUTH VDOUTL IOUTHIZ Power Output High Level Power Output Low Level Output Diode High Level IPOUTH = - 10mA, VPP = 65V IPOUTH = - 40mA, VPP = 65V IPOUTL = + 10mA IPOUTL = + 30mA IDOUTH = + 25mA (2)(3) 55 TBD 4 0.8 VCC 60 2 12 0.1 5 TBD 3 -3 10 0.3 0.2 VCC 1 -1 V V V V V V A V V V V A A Logic Supply Voltage Logic Supply Current Logic Supply Current Power Output Supply Voltage Power Output Supply Current (steady outputs) fCLK = 20MHz 4.5 5 12 5.5 100 TBD 160 100 V A mA V A Parameter Test Conditions Min. Typ. Max. Unit Output Diode Low Level IDOUTL = - 25mA (2)(3) Output Stage Leakage Current on HIZ State SHIFT REGISTER OUTPUT (Ai or Bi according to F/R Status) VOH Logic Output High Level IOH = - 0.5mA VOL Logic Output Low Level IOL = + 0.5mA INPUT (CLK, STB, BLK, HIZ, Ai, Bi) VIH VIL IIH IIL Input High Level Input Low Level High Level Input Current Low Level Input Current VIH = VCC VIL = 0V Notes : 2. Compatible with power dissipation and Tjoper 125C. 3. See test diagram. 8/11 CM17699 6 - STV7699 SPECIFICATIONS (continued) 6.6.3 - AC Timings Requirements (VCC = 4.5V to 5.5V, Tamb = -20 to +85C, input signals max leading edge & trailing edge (tR, tF) = 10ns) Symbol tCLK tWHCLK tWLCLK tSDAT tHDAT tDSTB tSTB tBLK tPOL tHIZ tSFR Data Clock Period Duration of clock (CLK) pulse at high level Duration of clock (CLK) pulse at low level Set-up Time of data input before clock (low to high) transition Hold Time of data input after clock (low to high) transition Minimum Delay to latch (STB) after clock (low to high) transition Latch (STB) Low Level Pulse Duration Blanking (BLK) Pulse Duration Polarity (POL) Pulse Duration High Impedance (HIZ) Pulse Duration Set-up Time of Forward /Reverse Signal before Clock (low to high) transition Parameter Min. 50 15 15 0 15 20 10 100 100 100 100 Typ. Max. Unit ns ns ns ns ns ns ns ns ns ns ns 6.6.4 - AC Timings Characteristics (VCC = 5V, VPP = 65V, VSSP = 0V, VSSLOG = 0V, VSSSUB = 0V, Tamb = 25C, VILMax. = 0.2VCC, VIHMin. = 0.8VCC, VOH = 4.0V, VOL = 0.4V, CL = 10pF, unless otherwise specified) Symbol tCLK tRDAT tFDAT tPHL1 tPLH1 tPHL2 tPLH2 tPHL3 tPLH3 tPHL4 tPLH4 tPHZ5 tPLZ5 tPZH5 tPZL5 tROUT tFOUT Data Clock Period Logical Data Output Rise Time Logical Data Output Fall Time Delay of logic data output (high to low transition) after clock (CLK) transition Delay of logic data output (low to high transition) after clock (CLK) transition Delay of power output change (high to low transition) after clock (CLK) transition Delay of power output change (low to high transition) after clock (CLK) transition Delay of power output change (high to low transition) after Latch (STB) transition Delay of power output change (low to high transition) after Latch (STB) transition Delay of power output change (high to low transition) to Blank (BLK) or Polarity (POL) transition Delay of power output change (low to high transition) to Blank (BLK) or Polarity (POL) transition Delay of power output change (high to Hi-Z transition) after high impedance (HIZ) (5) Delay of power output change (low to Hi-Z transition) after high impedance (HIZ) (5) Delay of power output change (Hi-Z to high transition) after high impedance (HIZ) (5) Delay of power output change (Hi-Z to low transition) after high impedance (HIZ) (5) Power Output Rise Time (6) Power Output Fall Time (6) Parameter Min. 50 Typ. Max. Unit TBD TBD 40 40 TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD 30 30 TBD TBD 120 120 110 110 100 100 100 100 100 100 150 150 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Notes : 5. See test diagram. 6. One output among 64, loading capacitor COUT = 50pF, other outputs at low level. 9/11 CM17699 6 - STV7699 SPECIFICATIONS (continued) Figure 5 : AC Characteristics Waveform tCLK tWHCLK tWLCLK "1" CLK 50% 50% tSDAT 50% tHDAT "0" "1" SIN tFDAT SOUT 90% 10% tSTB tRDAT tPLH1 tDSTB STB 50% tSFR 50% "0" "1" F/R tPHL3 90% 10% tPLH3 90% 10% tPOL 50% tPHL2 90% 10% "0" tPLH2 "1" POL 50% tPLH4 90% OUTn 10% "0" tHIZ HIZ tROUT 90% 10% 90% 10% tFOUT 50% tPHZ5 90% 10% tPLZ5 50% tPZH5 90% 10% "0" tPZL5 "0" "1" 7699C-06.EPS 50% tPHL1 50% "0" "1" 50% "0" "1" "0" "1" OUTn 50% tPHL4 "0" "1" "1" OUTn 10/11 CM17699 6 - STV7699 SPECIFICATIONS (continued) 6.7 - Input/output Schematics Figure 6 : F/R, BLK, POL, HIZ Figure 7 : CLK, STB VCC (Pin 100) VCC (Pin 100) F/R, BLK, POL, HIZ (Pins 89, 88, 87, 86) CLK, STB (Pins 95, 94) VSSLOG (Pins 90 to 93) 7699C-07.EPS 7699C-08.EPS 7699C-10.EPS VSSSUB (Pins 41-81) VSSSUB (Pins 41-81) VSSLOG (Pins 90 to 93) Figure 8 : Ai, Bi VCC (Pin 100) Figure 9 : Power Output A4 to A1 (Pins 96 to 99) B1 to B4 (Pins 82 to 85) VPP (Pins 1, 29, 30, 51, 52, 80) VSSSUB (Pins 41-81) VSSLOG (Pins 90 to 93) OUTi (Pins 2 to 5, 7 to 14, 16 to 23, 25 to 28, 31 to 34, 36 to 39, 42 to 45, 47 to 50, 53 to 56, 58 to 65, 67 to 74, 76 to 79) 7699C-09.EPS VSSP (Pins 6, 15, 24, 35, 40, 46, 57, 66, 75) VSSLOG (Pins 90 to 93) Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - All Rights Reserved Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. 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